Status and progress of installation related activities

• Infrastructure at point 2
  • Crate in rack C22 installed
    • Power supply repaired and connected (DONE)
    • Cooling connected (DONE)
    • CANbus cable connection to remote control power supply missing (DONE)
  • Optical patch panel in rack C22 (splitters)
    • Installed (DONE)
    • Optical connections from detector to be commissioned (DONE)
  • Optical TTC link (DONE)
    • Fiber rounting from CTP fanout to crate (DONE)
      • WARNING: this may need an optical attenuator, see CTP requirements
  • (DONE) Windows DCS working node (alipitwn00 ?) to control power supply (CAN) and to run PVSS project
    • Installation (DONE)
    • Our PVSS project installation (DONE)
    • CANbus controller and cable connection (DONE) * (DONE) SLC4 DCS working node to host the dim_fedServer software
    • PC (formerly DAQ pc aldaqpc021 in DSF, MAC:00-30-48-2D-71-42) installed in rack in CR3 (DONE by Fuchs)
    • DDL optical link between this PC and crate in rack C22 (DONE)
    • DCS SLC4 installation, renaming of PC to DCS convention (alipitwn01 ?) (DONE)
    • DATE installation, fecc2rorc library (DONE)
    • fedServer installation (DONE)
  • (DONE) Dedicated laptop to temporarily allow remote reconfiguration
    • laptop procurement (DONE)
    • laptop registration (DONE)
    • NICE and SLC4 installation (DONE)
    • Xilinx USB programmer procurement (DONE)
    • Installation of XIlinx programming software (DONE)

• Production BRAIN board
  • Reparation at CERN of instance 1 (DONE)
  • JTAG access test (DONE)
  • Full JTAG boundary interconnection test (DONE)
  • Clock verification (DONE)
  • Commissioning
    • Fast-OR buses BER measurements (DONE)
    • Control bus communication BER measurement (DONE)
    • Test with detector modules in DSF (DONE)
    • Operation with 10 OPTIN plugged, UDF Fast-OR pattern test, temperature measurement (TO DO)

• Activity in DSF
  • 4 half staves installed, 2 hs operational (tested with full readout)
  • Test system
    • (DONE)Interlock in place
    • (DONE)spdFed usable version
    • (DONE) SPD PVSS
  • (DONE) Transfer of pixeltrigger setup from pixel lab to DSF
  • (DONE) Testing of the full chain, cosmic run with pixeltrigger as trigger source
  • (DONE) Measurement of pit latency (DONE)
  • (WORKING) Operation of 10 OPTIN boards simultaneously plugged, automated BER test
  • (DONE) Tests of the TTCrx reset procedure
    • Program BRAIN V1 and test the reset of TTC
    • Test reset from software

• Other
  • Procurement of more 12-LC/MTP optical cables, only one spare left after installation at point 2 (TO DO)
  • Measurements of Fast-OR latencies with laser pulse (summer student)

-- Main.GianlucaAglieriRinella - 17 Feb 2008