PitHardware

Correspondance between OPTIN boards and SPD half-sectors

OPTIN

half-sector

  

OPTIN

half-sector
0 0 A 5 0 C
1 A 1 C
1 2 A 6 2 C
3 A 3 C
2 4 A 7 4 C
5 A 5 C
3 6 A 8 6 C
7 A 7 C
4 8 A 9 8 C
9 A 9 C

 

Last updated - 30 May 2008  

  • (WORKING) Installation of full system at point 2
    • (WORKING, Michel) Installation of power bus for side a in PIT crate with 6 power cables
    • (TO DO, Giuseppe, Michel) Install all Zarlink optical modules on the OPTIN boards
    • (TO DO, Giuseppe) Program Control FPGA and Processing FPGA of board V1, OPTIN boards (in DSF) with latest firmware (available on G:/Users/g/gaglieri/public/programming_files/)
    • (TO DO, Giuseppe) Verify that all channels on the OPTIN boards receive optical signals and lock onto the G-LINK coming from the MPT card runnign the MCM emulator
    • (TO DO, Giuseppe) Long term BER tests of the OPTIN boards
      • Memory access tests
      • Fast-OR transmission tests with the MPT board/MCM emulator
    • (TO DO, Giuseppe) Insert OPTIN boards in the JTAG chain of BRAIN board by setting jumpers properly
    • (TO DO, Giuseppe and Michel) repair (substitution) of the faulty Agilent chip on the OPTIN board that is in the DSF installed on the V1 board
    • (TO DO, Costanza and Giuseppe) verify correspondence between HS in the SPD control and HS in the PIT control. This can be done by setting test pulses on the chip of a given HS, sending internal triggers and counting Fast-OR seen by the pit counters